Curation by juander 1 year ago for query yosys

Original results

https://en.wikipedia.org/wiki/Go!_Live_Your_Way — found via Wikipedia

Go! Live Your Way

Cáceres Samuel Nascimento as Fabricio Johanna Francella as Rosario Yosy Machado as Yosy Luisa Drozdek as Teresa Daniel Campomenosi as Javier Paz Marina Castillo
https://en.wikipedia.org/wiki/Register-transfer_level — found via Wikipedia

Register-transfer level

and VHDL (2nd ed.). John Wiley and Sons. p. 247. ISBN 978-0-470-53108-2. Yosys Manual (RTLIL) "Power Estimation Techniques for Integrated Circuits " "Low-Power
https://en.wikipedia.org/wiki/Comparison_of_EDA_software — found via Wikipedia

Comparison of EDA software

tools from high-level synthesis down to layout generation The flow includes Yosys for logic synthesis, OpenLane for physical synthesis and targets the SkyWater
https://en.wikipedia.org/wiki/List_of_HDL_simulators — found via Wikipedia

List of HDL simulators

ngspice, Yosys communities and Isotel V2005 Open-source mixed signal ngspice simulator in combination with verilog synthesis software called Yosys and Isotel
https://en.wikipedia.org/wiki/Verilog-to-Routing — found via Wikipedia

Verilog-to-Routing

and then VPR to perform placement and routing, while Symbiflow uses the Yosys synthesis tool followed by VPR placement and routing. ODIN II is the HDL
https://github.com/YOSYS — found via Mwmbl

YOSYS · GitHub

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Yosys Headquarters · GitHub

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yosys · GitHub Topics · GitHub

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http://github.com/YosysHQ/yosys/discussions — found via Mwmbl

YosysHQ/yosys · Discussions · GitHub

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https://github.com/YosysHQ/scy — found via Mwmbl

GitHub - YosysHQ/scy: Sequence of Covers with Yosys

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https://github.com/YosysHQ/eqy — found via Mwmbl

GitHub - YosysHQ/eqy: Equivalence checking with Yosys

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https://github.com/YosysHQ/mcy — found via Mwmbl

GitHub - YosysHQ/mcy: Mutation Cover with Yosys (MCY)

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https://github.com/YosysHQ/nerv — found via Mwmbl

GitHub - YosysHQ/nerv: Naive Educational RISC V processor

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http://github.com/YosysHQ/yosys — found via Mwmbl

GitHub - YosysHQ/yosys: Yosys Open SYnthesis Suite

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http://github.com/YosysHQ/apicula — found via Mwmbl

GitHub - YosysHQ/apicula: Project Apicula 🐝: bitstream documenta…

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http://github.com/YosysHQ/nextpnr — found via Mwmbl

GitHub - YosysHQ/nextpnr: nextpnr portable FPGA place and route …

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http://github.com/YosysHQ/picorv32 — found via Mwmbl

GitHub - YosysHQ/picorv32: PicoRV32 - A Size-Optimized RISC-V CPU

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https://github.com/YosysHQ/apicula — found via Mwmbl

GitHub - YosysHQ/apicula: Project Apicula 🐝: bitstream document…

A tag already exists with the provided branch name. Many Git commands accept both tag and branch names, so creating this branch may cause unexpected behav…
http://github.com/YosysHQ/yosys/wiki — found via Mwmbl

Home · YosysHQ/yosys Wiki · GitHub

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Tags · YosysHQ/yosys · GitHub

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http://github.com/YosysHQ/prjtrellis — found via Mwmbl

GitHub - YosysHQ/prjtrellis: Documenting the Lattice ECP5 bit-st…

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Pulse · YosysHQ/yosys · GitHub

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https://github.com/YosysHQ/scy/tags — found via Mwmbl

Releases · YosysHQ/scy · GitHub

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Issues · YosysHQ/yosys · GitHub

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https://github.com/YosysHQ/arachne-pnr — found via Mwmbl

GitHub - YosysHQ/arachne-pnr: Place and route tool for FPGAs

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Pull requests · YosysHQ/mcy · GitHub

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Branches · YosysHQ/mcy · GitHub

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Pull requests · YosysHQ/yosys · GitHub

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https://github.com/YosysHQ/nerv/pulls — found via Mwmbl

Pull requests · YosysHQ/nerv · GitHub

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https://github.com/YosysHQ/yosys/releases — found via Mwmbl

Releases · YosysHQ/yosys · GitHub

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Stargazers · YosysHQ/yosys · GitHub

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Projects · mcy · GitHub

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https://github.com/YosysHQ/yosys/releases/latest — found via Mwmbl

Release Yosys 0.42 · YosysHQ/yosys · GitHub

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http://github.com/YosysHQ/yosys/pull/4439 — found via Mwmbl

liberty: Support for IO liberty files for verification by gateca…

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http://github.com/YosysHQ/apicula/projects — found via Mwmbl

Projects · apicula · GitHub

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https://github.com/YosysHQ/nextpnr/projects — found via Mwmbl

Projects · nextpnr · GitHub

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https://github.com/YosysHQ/yosys/issues/103 — found via Mwmbl

Cannot initialise registers to values other than zero · Issue #1…

Comments Also I'm not sure whether this issue rightly belongs here, on arachne-pnr or icestorm. Here it is, code such as: reg [31:0] rng = 32'h00010000; …
https://github.com/YosysHQ/yosys/issues/448 — found via Mwmbl

Spartan 3/6 support with ISE backend? · Issue #448 · YosysHQ/yos…

About Spartan-3, for sure there will be some work to be done in the technology map flow. You can start by extracting the Spartan-3 simulation models from …
http://github.com/YosysHQ/yosys/tree/gatecat/io-liberty — found via Mwmbl

File not found · GitHub

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https://hackaday.com/tag/yosys/ — found via Mwmbl

Yosys | Hackaday

yosys 10 Articles [Sevan Janiyan] shares their research on putting an open FPGA toolchain together. Specifically, this is an open toolchain for the Sipee…
http://stackoverflow.com/a/44985760 — found via Mwmbl

Yosys optimizes away ring oscillator on ice40 FPGA - Stack Overf…
http://yosyshq.net/ — found via Mwmbl

YosysHQ
https://yosyshq.net/yosys — found via Mwmbl

Yosys Open SYnthesis Suite :: About

About Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms fo…
http://yosyshq.net/yosys/faq.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Frequently Asked Questions

Frequently Asked Questions 1. How to report bugs and request support? If possible, do not mail the author directly with bug reports or support questions.…
http://yosyshq.net/yosys/links.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Links
http://yosyshq.net/yosys/yosysjs.html — found via Mwmbl

Yosys Open SYnthesis Suite :: VlogHammer

The created Yosys instance will reside in a hidden <iframe> in your page. You can pass the id of an iframe element or the DOM element itself as first par…
http://yosyshq.net/yosys/download.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Download

Windows Builds for Windows can be built with VisualStudio or cross-compiled with MXE. VisualStudio project files are created as part of the automated tes…
http://yosyshq.net/yosys/commercial.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Commercial
http://yosyshq.net/yosys/screenshots.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Screenshots
https://yosyshq.net/faq.html — found via Mwmbl

Page not found · GitHub Pages
https://yosyshq.net/yosys/documentation.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Documentation

Documentation Yosys Manual The Yosys manual contains information about the internals of Yosys, and a detailed guide through how to use the tool. Descript…
https://semiengineering.com/tag/yosys/ — found via Mwmbl

Yosys Archives Semiconductor Engineering

tag: Yosys Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-M…
https://jix.one/yosys/ — found via Mwmbl

Yosys

Yosys Yosys and associated YosysHQ projects form an open-source hardware synthesis and formal verification toolchain. In 2022 I strarted contributing to …
http://yosyshq.readthedocs.io — found via Mwmbl

YosysHQ Documentation Library
https://yosyshq.readthedocs.io/projects/mcy — found via Mwmbl

YosysHQ MCY documentation

MCY is a new tool to help digital designers and project managers understand and improve testbench coverage. If you have a testbench, and it fails, you kn…
https://yosyshq.readthedocs.io/en/latest/tools.html — found via Mwmbl

YosysHQ Tool Documentation

Yosys is a framework for RTL synthesis and more. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for var…
http://yosyshq.readthedocs.io/tools.html — found via Mwmbl

404 Not Found | Read the Docs
https://yosyshq.readthedocs.io/projects/yosys/en/0.35/ — found via Mwmbl

Yosys manual

Most of today’s digital design is done in HDL code (mostly Verilog or VHDL) and with the help of HDL synthesis tools. In special cases such as synthesis …
https://yosyshq.readthedocs.io/projects/eqy — found via Mwmbl

Equivalence Checking with Yosys (EQY) Documentation
https://www.eevblog.com/forum/fpga/gowin-vs-yosys/ — found via Mwmbl

Gowin Vs. Yosys - Page 1

Author Topic: Gowin Vs. Yosys (Read 3839 times) I have been trying to figure out why this design works in simulation but not on my device I have been tra…
https://blog.yosyshq.com — found via Mwmbl

YosysHQ Blog
https://blog.yosyshq.com/p/yosys-users-group/ — found via Mwmbl

Yosys User's Group
http://blog.yosyshq.com/tags/yug/ — found via Mwmbl

Tag: yug - YosysHQ Blog
http://blog.yosyshq.com/tags/blog/ — found via Mwmbl

Tag: blog - YosysHQ Blog
http://blog.yosyshq.com/search — found via Mwmbl

Search
http://blog.yosyshq.com/p/hello/ — found via Mwmbl

Hello World!

We also provide support and training for users of our Tabby CAD Suite package and for developers building their work on top of our open source projects. …
http://blog.yosyshq.com/p/ap109/ — found via Mwmbl

App Note 109

Property Checking with SystemVerilog Assertions This Application Note was written with the intention of showing a brief introduction to SVA, and is defin…
http://blog.yosyshq.com/archives — found via Mwmbl

Archives
http://blog.yosyshq.com/p/ap120/ — found via Mwmbl

App Note 120
https://blog.yosyshq.com/tags/one-liners/ — found via Mwmbl

Tag: One Liners - YosysHQ Blog
https://projectf.io/tags/yosys — found via Mwmbl

Yosys - Project F

Tag: Yosys iCE40 FPGA Toolchain on Linux In this post, I provide a quick guide to building an open-source FPGA toolchain for iCE40 boards, such as iCEBre…
https://fosstodon.org/@yosyshq — found via Mwmbl

YosysHQ (@yosyshq@fosstodon.org) - Fosstodon
http://www.yosyshq.com — found via Mwmbl

About

YosysHQ GmbH The new home for the team maintaining Yosys and related Open Source EDA projects About Us You might know us from our many Open Source EDA Pr…
http://www.yosyshq.com/jobs — found via Mwmbl

Jobs

Work With Us! Would you be happy to work independently in a fully remote team distributed around the world? You would be working as an independent contra…
http://www.yosyshq.com/team — found via Mwmbl

Team

We are a diverse team of people from all over the world. You might know us for our Open Source EDA projects . At YosysHQ we come together to improve the O…
http://www.yosyshq.com/open-source — found via Mwmbl

Open Source

Yosys is a framework for RTL synthesis and more. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for var…
http://www.yosyshq.com/contact — found via Mwmbl

Contact
http://www.yosyshq.com/pricing — found via Mwmbl

Pricing
http://www.yosyshq.com/support-us — found via Mwmbl

Support us

Support us YosysHQ is always happy to receive support in order to help us improve the open source tools. We'd like to say thanks to the companies that su…
http://www.yosyshq.com/newsletter — found via Mwmbl

Newsletter
https://www.yosyshq.com/tabby-cad-datasheet — found via Mwmbl

Tabby CAD Datasheet
http://symbiyosys.readthedocs.io — found via Mwmbl

YosysHQ SBY documentation
https://tracker.debian.org/yosys — found via Mwmbl

yosys - Debian Package Tracker

vcswatch reports that the current version of the package is not in its VCS. Either you need to push your commits and/or your tags, or the information abo…
https://manpages.org/yosys — found via Mwmbl

man yosys (1): Yosys Open SYnthesis Suite
http://www.fabienm.eu/flf/tag/yosys/ — found via Mwmbl

yosys | Front de Libération des FPGA

Formal prove is a great method to find bugs into our gateware. But for many years, this was reserved to big companies with lot of $$. Some years ago, Cli…
https://zinka.wordpress.com/tag/yosys/ — found via Mwmbl

Yosys – Arraytool

An open source Python based package for phased array antenna analysis and design Yosys cocotb Recently I have come across a python library called cocotb …
https://readthedocs.org/projects/yosys — found via Mwmbl

yosys | Read the Docs
https://readthedocs.org/projects/yosyshq/ — found via Mwmbl

YosysHQ | Read the Docs
https://section5.ch/index.php/tag/yosys/ — found via Mwmbl

yosys – section5

Tag: yosys There are various approaches to Python HDLs, some more suited to Python developers than to HDL developers. They all have one thing in common: …
https://yosyshq.github.io/prjtrellis-db/ — found via Mwmbl

Project Trellis HTML Documentation
http://GitHub.com/YosysHQ/abc — found via Mwmbl

GitHub - YosysHQ/abc: ABC: System for Sequential Logic Synthesis…

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GitHub - YosysHQ/sby: SymbiYosys (sby) -- Front-end for Yosys-ba…

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Tags · YosysHQ/sby · GitHub

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Tags · YosysHQ/abc · GitHub

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GitHub - YosysHQ/icestorm: Project IceStorm - Lattice iCE40 FPGA…

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Forks · YosysHQ/sby · GitHub

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Pulse · YosysHQ/sby · GitHub

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Issues · YosysHQ/sby · GitHub

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Labels · YosysHQ/abc · GitHub

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Labels · YosysHQ/sby · GitHub

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Home · YosysHQ/icestorm Wiki · GitHub

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Compare · YosysHQ/sby · GitHub

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Pull requests · YosysHQ/sby · GitHub

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Pull requests · YosysHQ/abc · GitHub

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Projects · yosys · GitHub

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Network Graph · YosysHQ/sby · GitHub

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Workflow runs · YosysHQ/sby · GitHub

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Security Overview · YosysHQ/sby · GitHub

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Security Overview · YosysHQ/abc · GitHub

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Projects · YosysHQ · GitHub

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Comparing berkeley-abc:master...YosysHQ:yosys-experimental · ber…

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Projects · sby · GitHub

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yosys · Anitya
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yosys - Arch Linux
http://www.stackoverflow.com/tags/yosys/new — found via Mwmbl

'yosys' New Answers - Stack Overflow

Tag Info Yosys is synthesizing a ROM for the case switch that drives the value of o_led and you seem to have run into the issue described in https://gith…
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Hottest 'yosys' Answers - Stack Overflow

Tag Info Yosys is synthesizing a ROM for the case switch that drives the value of o_led and you seem to have run into the issue described in https://gith…
https://cgit.freebsd.org/ports/tree/cad/yosys — found via Mwmbl

yosys « cad - ports - FreeBSD ports tree
http://snapshot.debian.org/package/yosys/0.32-2/ — found via Mwmbl

yosys (0.32-2) - snapshot.debian.org
http://freshports.org/devel/yosys/ — found via Mwmbl

FreshPorts -- devel/yosys: Yosys Open SYnthesis Suite

Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for vari…
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Labels · YosysHQ/yosys · GitHub

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Workflow runs · YosysHQ/yosys · GitHub

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C3Subtitles: 32. Chaos Communication Congress: A Free and Open S…

Yosys (Yosys Open Synthesis Suite) is an Open Source Verilog synthesis and verification tool. Project IceStorm aims at reverse engineering and documentin…
https://www.libhunt.com/topic/yosys/edit — found via Mwmbl

Edit yosys details | LibHunt
https://sources.debian.org/src/yosys/ — found via Mwmbl

Package: yosys | Debian Sources
https://qa.debian.org/cgi-bin/vcswatch?package=yosys — found via Mwmbl

yosys vcswatch -- Debian Quality Assurance

JSON Enter a full Vcs-* header, supported schemes are: Vcs-Bzr, Vcs-Cvs, Vcs-Darcs, Vcs-Git, Vcs-Hg, Vcs-Mtn, Vcs-Svn. For Vcs-Git append -b branch to se…
https://git.alpinelinux.org/aports/tree/testing/yosys — found via Mwmbl

yosys « testing - aports - Alpine packages build scripts
https://github.com:443/orgs/YosysHQ/packages — found via Mwmbl

Packages · Yosys Headquarters · GitHub

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ALT Linux - p9 - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Open SY…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - p10 - yosys-0.39-alt1 - Yosys Open SYnthesis Suite

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - c9f2 - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Open …

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - c10f1 - yosys-0.25-alt1 - Yosys Open SYnthesis Suite

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - p9_e2k - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Ope…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - p10_e2k - yosys-0.39-alt1 - Yosys Open SYnthesis Sui…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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ALT Linux - sisyphus - yosys-0.40-alt1 - Yosys Open SYnthesis Su…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
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LUGA — 2014

2014 Yosys is the first full-featured open source software for Verilog HDL synthesis. It supports most of Verilog-2005 and is well tested with real-world…
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learning nmigen

Open yosys in interactive mode and load the generated verilog file. Calling "show" should generate the diagram .dot file (as a temp file "~/.yosys_show.do…
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Manpages of yosys in Debian unstable — Debian Manpages

New results

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YOSYS · GitHub

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YosysHQ
http://github.com/YosysHQ — found via Mwmbl

Yosys Headquarters · GitHub

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yosys · GitHub Topics · GitHub

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YosysHQ/yosys · Discussions · GitHub

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GitHub - YosysHQ/scy: Sequence of Covers with Yosys

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GitHub - YosysHQ/eqy: Equivalence checking with Yosys

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GitHub - YosysHQ/mcy: Mutation Cover with Yosys (MCY)

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GitHub - YosysHQ/nerv: Naive Educational RISC V processor

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GitHub - YosysHQ/yosys: Yosys Open SYnthesis Suite

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GitHub - YosysHQ/apicula: Project Apicula 🐝: bitstream documenta…

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GitHub - YosysHQ/nextpnr: nextpnr portable FPGA place and route …

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GitHub - YosysHQ/picorv32: PicoRV32 - A Size-Optimized RISC-V CPU

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GitHub - YosysHQ/apicula: Project Apicula 🐝: bitstream document…

A tag already exists with the provided branch name. Many Git commands accept both tag and branch names, so creating this branch may cause unexpected behav…
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Home · YosysHQ/yosys Wiki · GitHub

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Tags · YosysHQ/yosys · GitHub

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GitHub - YosysHQ/prjtrellis: Documenting the Lattice ECP5 bit-st…

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Pulse · YosysHQ/yosys · GitHub

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Releases · YosysHQ/scy · GitHub

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Issues · YosysHQ/yosys · GitHub

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GitHub - YosysHQ/arachne-pnr: Place and route tool for FPGAs

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Pull requests · YosysHQ/mcy · GitHub

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Branches · YosysHQ/mcy · GitHub

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Pull requests · YosysHQ/yosys · GitHub

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Pull requests · YosysHQ/nerv · GitHub

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Releases · YosysHQ/yosys · GitHub

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Stargazers · YosysHQ/yosys · GitHub

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Projects · mcy · GitHub

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Release Yosys 0.42 · YosysHQ/yosys · GitHub

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liberty: Support for IO liberty files for verification by gateca…

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Projects · apicula · GitHub

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Projects · nextpnr · GitHub

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Cannot initialise registers to values other than zero · Issue #1…

Comments Also I'm not sure whether this issue rightly belongs here, on arachne-pnr or icestorm. Here it is, code such as: reg [31:0] rng = 32'h00010000; …
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Spartan 3/6 support with ISE backend? · Issue #448 · YosysHQ/yos…

About Spartan-3, for sure there will be some work to be done in the technology map flow. You can start by extracting the Spartan-3 simulation models from …
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File not found · GitHub

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Go! Live Your Way

Cáceres Samuel Nascimento as Fabricio Johanna Francella as Rosario Yosy Machado as Yosy Luisa Drozdek as Teresa Daniel Campomenosi as Javier Paz Marina Castillo
https://en.wikipedia.org/wiki/Register-transfer_level — found via Wikipedia

Register-transfer level

and VHDL (2nd ed.). John Wiley and Sons. p. 247. ISBN 978-0-470-53108-2. Yosys Manual (RTLIL) "Power Estimation Techniques for Integrated Circuits " "Low-Power
https://en.wikipedia.org/wiki/Comparison_of_EDA_software — found via Wikipedia

Comparison of EDA software

tools from high-level synthesis down to layout generation The flow includes Yosys for logic synthesis, OpenLane for physical synthesis and targets the SkyWater
https://en.wikipedia.org/wiki/List_of_HDL_simulators — found via Wikipedia

List of HDL simulators

ngspice, Yosys communities and Isotel V2005 Open-source mixed signal ngspice simulator in combination with verilog synthesis software called Yosys and Isotel
https://en.wikipedia.org/wiki/Verilog-to-Routing — found via Wikipedia

Verilog-to-Routing

and then VPR to perform placement and routing, while Symbiflow uses the Yosys synthesis tool followed by VPR placement and routing. ODIN II is the HDL
https://hackaday.com/tag/yosys/ — found via Mwmbl

Yosys | Hackaday

yosys 10 Articles [Sevan Janiyan] shares their research on putting an open FPGA toolchain together. Specifically, this is an open toolchain for the Sipee…
http://stackoverflow.com/a/44985760 — found via Mwmbl

Yosys optimizes away ring oscillator on ice40 FPGA - Stack Overf…
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Yosys Open SYnthesis Suite :: About

About Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms fo…
http://yosyshq.net/yosys/faq.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Frequently Asked Questions

Frequently Asked Questions 1. How to report bugs and request support? If possible, do not mail the author directly with bug reports or support questions.…
http://yosyshq.net/yosys/links.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Links
http://yosyshq.net/yosys/yosysjs.html — found via Mwmbl

Yosys Open SYnthesis Suite :: VlogHammer

The created Yosys instance will reside in a hidden <iframe> in your page. You can pass the id of an iframe element or the DOM element itself as first par…
http://yosyshq.net/yosys/download.html — found via Mwmbl

Yosys Open SYnthesis Suite :: Download

Windows Builds for Windows can be built with VisualStudio or cross-compiled with MXE. VisualStudio project files are created as part of the automated tes…
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Yosys Open SYnthesis Suite :: Commercial
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Yosys Open SYnthesis Suite :: Screenshots
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Page not found · GitHub Pages
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Yosys Open SYnthesis Suite :: Documentation

Documentation Yosys Manual The Yosys manual contains information about the internals of Yosys, and a detailed guide through how to use the tool. Descript…
https://semiengineering.com/tag/yosys/ — found via Mwmbl

Yosys Archives Semiconductor Engineering

tag: Yosys Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-M…
https://jix.one/yosys/ — found via Mwmbl

Yosys

Yosys Yosys and associated YosysHQ projects form an open-source hardware synthesis and formal verification toolchain. In 2022 I strarted contributing to …
http://yosyshq.readthedocs.io — found via Mwmbl

YosysHQ Documentation Library
https://yosyshq.readthedocs.io/projects/mcy — found via Mwmbl

YosysHQ MCY documentation

MCY is a new tool to help digital designers and project managers understand and improve testbench coverage. If you have a testbench, and it fails, you kn…
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YosysHQ Tool Documentation

Yosys is a framework for RTL synthesis and more. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for var…
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404 Not Found | Read the Docs
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Yosys manual

Most of today’s digital design is done in HDL code (mostly Verilog or VHDL) and with the help of HDL synthesis tools. In special cases such as synthesis …
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Equivalence Checking with Yosys (EQY) Documentation
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Gowin Vs. Yosys - Page 1

Author Topic: Gowin Vs. Yosys (Read 3839 times) I have been trying to figure out why this design works in simulation but not on my device I have been tra…
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YosysHQ Blog
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Yosys User's Group
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Tag: yug - YosysHQ Blog
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Tag: blog - YosysHQ Blog
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Search
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Hello World!

We also provide support and training for users of our Tabby CAD Suite package and for developers building their work on top of our open source projects. …
http://blog.yosyshq.com/p/ap109/ — found via Mwmbl

App Note 109

Property Checking with SystemVerilog Assertions This Application Note was written with the intention of showing a brief introduction to SVA, and is defin…
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Archives
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App Note 120
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Tag: One Liners - YosysHQ Blog
https://projectf.io/tags/yosys — found via Mwmbl

Yosys - Project F

Tag: Yosys iCE40 FPGA Toolchain on Linux In this post, I provide a quick guide to building an open-source FPGA toolchain for iCE40 boards, such as iCEBre…
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YosysHQ (@yosyshq@fosstodon.org) - Fosstodon
http://www.yosyshq.com — found via Mwmbl

About

YosysHQ GmbH The new home for the team maintaining Yosys and related Open Source EDA projects About Us You might know us from our many Open Source EDA Pr…
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Jobs

Work With Us! Would you be happy to work independently in a fully remote team distributed around the world? You would be working as an independent contra…
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Team

We are a diverse team of people from all over the world. You might know us for our Open Source EDA projects . At YosysHQ we come together to improve the O…
http://www.yosyshq.com/open-source — found via Mwmbl

Open Source

Yosys is a framework for RTL synthesis and more. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for var…
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Contact
http://www.yosyshq.com/pricing — found via Mwmbl

Pricing
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Support us

Support us YosysHQ is always happy to receive support in order to help us improve the open source tools. We'd like to say thanks to the companies that su…
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Newsletter
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Tabby CAD Datasheet
http://symbiyosys.readthedocs.io — found via Mwmbl

YosysHQ SBY documentation
https://tracker.debian.org/yosys — found via Mwmbl

yosys - Debian Package Tracker

vcswatch reports that the current version of the package is not in its VCS. Either you need to push your commits and/or your tags, or the information abo…
https://manpages.org/yosys — found via Mwmbl

man yosys (1): Yosys Open SYnthesis Suite
http://www.fabienm.eu/flf/tag/yosys/ — found via Mwmbl

yosys | Front de Libération des FPGA

Formal prove is a great method to find bugs into our gateware. But for many years, this was reserved to big companies with lot of $$. Some years ago, Cli…
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Yosys – Arraytool

An open source Python based package for phased array antenna analysis and design Yosys cocotb Recently I have come across a python library called cocotb …
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yosys | Read the Docs
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YosysHQ | Read the Docs
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yosys – section5

Tag: yosys There are various approaches to Python HDLs, some more suited to Python developers than to HDL developers. They all have one thing in common: …
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Project Trellis HTML Documentation
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GitHub - YosysHQ/abc: ABC: System for Sequential Logic Synthesis…

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GitHub - YosysHQ/sby: SymbiYosys (sby) -- Front-end for Yosys-ba…

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Tags · YosysHQ/sby · GitHub

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Tags · YosysHQ/abc · GitHub

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GitHub - YosysHQ/icestorm: Project IceStorm - Lattice iCE40 FPGA…

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Forks · YosysHQ/sby · GitHub

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Pulse · YosysHQ/sby · GitHub

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Issues · YosysHQ/sby · GitHub

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Labels · YosysHQ/abc · GitHub

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Labels · YosysHQ/sby · GitHub

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Home · YosysHQ/icestorm Wiki · GitHub

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Compare · YosysHQ/sby · GitHub

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Pull requests · YosysHQ/sby · GitHub

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Pull requests · YosysHQ/abc · GitHub

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Projects · yosys · GitHub

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Network Graph · YosysHQ/sby · GitHub

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Workflow runs · YosysHQ/sby · GitHub

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Security Overview · YosysHQ/sby · GitHub

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Security Overview · YosysHQ/abc · GitHub

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Projects · YosysHQ · GitHub

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Comparing berkeley-abc:master...YosysHQ:yosys-experimental · ber…

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Projects · sby · GitHub

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yosys · Anitya
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yosys - Arch Linux
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'yosys' New Answers - Stack Overflow

Tag Info Yosys is synthesizing a ROM for the case switch that drives the value of o_led and you seem to have run into the issue described in https://gith…
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Hottest 'yosys' Answers - Stack Overflow

Tag Info Yosys is synthesizing a ROM for the case switch that drives the value of o_led and you seem to have run into the issue described in https://gith…
https://cgit.freebsd.org/ports/tree/cad/yosys — found via Mwmbl

yosys « cad - ports - FreeBSD ports tree
http://snapshot.debian.org/package/yosys/0.32-2/ — found via Mwmbl

yosys (0.32-2) - snapshot.debian.org
http://freshports.org/devel/yosys/ — found via Mwmbl

FreshPorts -- devel/yosys: Yosys Open SYnthesis Suite

Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for vari…
http://guthub.com/YosysHQ/yosys/labels — found via Mwmbl

Labels · YosysHQ/yosys · GitHub

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Workflow runs · YosysHQ/yosys · GitHub

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https://c3subtitles.de/talk/475 — found via Mwmbl

C3Subtitles: 32. Chaos Communication Congress: A Free and Open S…

Yosys (Yosys Open Synthesis Suite) is an Open Source Verilog synthesis and verification tool. Project IceStorm aims at reverse engineering and documentin…
https://www.libhunt.com/topic/yosys/edit — found via Mwmbl

Edit yosys details | LibHunt
https://sources.debian.org/src/yosys/ — found via Mwmbl

Package: yosys | Debian Sources
https://qa.debian.org/cgi-bin/vcswatch?package=yosys — found via Mwmbl

yosys vcswatch -- Debian Quality Assurance

JSON Enter a full Vcs-* header, supported schemes are: Vcs-Bzr, Vcs-Cvs, Vcs-Darcs, Vcs-Git, Vcs-Hg, Vcs-Mtn, Vcs-Svn. For Vcs-Git append -b branch to se…
https://git.alpinelinux.org/aports/tree/testing/yosys — found via Mwmbl

yosys « testing - aports - Alpine packages build scripts
https://github.com:443/orgs/YosysHQ/packages — found via Mwmbl

Packages · Yosys Headquarters · GitHub

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http://packages.altlinux.org/en/p9/srpms/yosys/ — found via Mwmbl

ALT Linux - p9 - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Open SY…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
http://packages.altlinux.org/en/p10/srpms/yosys/ — found via Mwmbl

ALT Linux - p10 - yosys-0.39-alt1 - Yosys Open SYnthesis Suite

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
http://packages.altlinux.org/en/c9f2/srpms/yosys/ — found via Mwmbl

ALT Linux - c9f2 - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Open …

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
https://packages.altlinux.org/en/c10f1/srpms/yosys/ — found via Mwmbl

ALT Linux - c10f1 - yosys-0.25-alt1 - Yosys Open SYnthesis Suite

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
http://packages.altlinux.org/en/p9_e2k/srpms/yosys/ — found via Mwmbl

ALT Linux - p9_e2k - yosys-0.7.0.0.826.g626b555-alt1 - Yosys Ope…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
http://packages.altlinux.org/en/p10_e2k/srpms/yosys/ — found via Mwmbl

ALT Linux - p10_e2k - yosys-0.39-alt1 - Yosys Open SYnthesis Sui…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
http://packages.altlinux.org/en/sisyphus/srpms/yosys/ — found via Mwmbl

ALT Linux - sisyphus - yosys-0.40-alt1 - Yosys Open SYnthesis Su…

Yosys is a framework for RTL synthesis tools. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for variou…
https://www.luga.at/veranstaltungen/2014/ — found via Mwmbl

LUGA — 2014

2014 Yosys is the first full-featured open source software for Verilog HDL synthesis. It supports most of Verilog-2005 and is well tested with real-world…
http://libre-soc.org/docs/learning_nmigen/ — found via Mwmbl

learning nmigen

Open yosys in interactive mode and load the generated verilog file. Calling "show" should generate the diagram .dot file (as a temp file "~/.yosys_show.do…
https://manpages.debian.org/unstable/yosys/index.html — found via Mwmbl

Manpages of yosys in Debian unstable — Debian Manpages